CPU Server Physical Design Clock Engineer
Qualcomm · Austin, TX
About this role
Qualcomm is hiring a mid-level Hardware Engineer in the software engineering function based in Austin, TX. Compensation is listed at $148,300–$222,500 per year.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Location
- Austin, TX
- Posted
- May 21, 2026
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Job description
from Qualcomm careers##
Company:
Qualcomm Technologies, Inc.
## Job Area:
Engineering Group, Engineering Group > CPU Engineering
General Summary:
As a Physical Design Clock Engineer, you will work with microarchitecture, RTL design, CAD, block level and top level physical design teams to create best in class clocking solutions for next generation CPUs.
### Minimum Skillsets
* Experience in all aspects of construction and analysis of low skew and low power clock generation and distribution.
* Experience in clock H-tree, mesh, spines and CTS implementations.
* Good understanding of device physics, RC delay and electrical aspects.
* Proficiency in SPICE simulation and analysis for circuit design and verification.
### Preferred qualifications
* MS in Electrical Engineering; 8+ years of practical experience.
* Skilled in chip physical design, standard cell optimizations, and clock construction.
* Defined clock methodology across various designs.
* Preferred experience in deep submicron process technology nodes.
* Proficient in PLL specifications, clock skew estimation, and jitter measurements.
* Strong communication skills for team collaboration and issue resolution.
### Roles and Responsibilities
* Work with design teams to understand, implement and validate CPU clocking.
* Drive overall clock generation and distribution methodology of CPU.
* Work with CAD & block level designers to implement the clocking techniques for optimizing skew and power.