mid Software Engineer ic Bachelor's Hybrid · Posted Jul 13, 2026

About this role

Cadence Design Systems is hiring a mid-level Software Engineer based in Austin, TX (hybrid). The posting calls out experience with Python, C, TensorFlow, Computer Vision. Listed education preference: a bachelor's degree or equivalent.

Role
Software Engineer
Function
software engineering
Level
mid
Track
Individual contributor
Employment
Full-time
Location
Austin, TX
Work mode
Hybrid
Education
Bachelor's degree
Posted
Jul 13, 2026
AI Summary
Develop AI compiler stack converting neural networks from PyTorch/TensorFlow into optimized code for embedded and special-purpose platforms. Design compiler optimizations, neural network operations, and multiprocessor scheduling strategies using LLVM/MLIR frameworks.

Job description

from Cadence Design Systems careers

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

Cadence Design Systems Inc. is looking for a motivated Software Engineer II: AI Compiler Engineer to work with us.

As a Software Engineer II: AI Compiler Engineer you will work with complex high performance SoC's, and is one of the best kept secrets within the semi IP world powering AR/VR, HiFi Audio and Speech, Vision, Imaging and hundreds of intelligent IoT applications.

Be a part of a team that develops an AI graph compiler that takes as input Neural Networks (NNs) created in frameworks such as PyTorch or TensorFlow and converts them into optimized code suitable for execution on special-purpose and embedded platforms.

Cadence is also a Fortune 100 Best Companies to Work For.

Job Description:

  • Developing a deep learning compiler stack that takes neural network descriptions (CNNs/RNNs) created in frameworks such as Caffe, PyTorch, TensorFlow, etc. and converts them into code suitable for execution on special-purpose and embedded platforms.
  • Use modern compiler frameworks such as LLVM and MLIR.
  • Developing optimized implementations of a variety of neural-network operations and integrating them into a runtime framework
  • Developing new optimization techniques and algorithms to efficiently map CNNs onto a wide range of Xtensa processors and specialized hardware.
  • Benchmarking end-to-end network performance on a variety of DSP and special-purpose accelerator platforms.
  • Enhancing the framework to improve overall functionality and performance on the various hardware platforms.
  • Devising multiprocessor/multicore partitioning and scheduling strategies.
  • Developing complex programs to validate the functionality and performance of the CNN application programming kit.
  • Working with hardware designers to identify opportunities for additional hardware acceleration of neural network functions.
  • Working with industry-leading partners and customers to design and standardize neural network APIs..

Requirements:

  • Complete Bachelor in Computer Science or Computer Engineering or equivalent experience.
  • A high level of C and C++ programming expertise with 3-5+ years of experience is required.
  • Expertise in software development on Linux and Windows systems including test, debug and release is required.
  • Knowledge of and experience with a state-of-the-art compiler stack such as LLVM and MLIR.
  • Experience implementing compilation techniques such loop optimization, polyhedral models, and IR construction/transition/lowering techniques.

Nice to have:

  • Master or PhD.
  • 3+ years of experience working on a production compiler is highly desired.
  • Python experience highly desired
  • Prior work with CNNs and familiarity with deep learning frameworks (TensorFlow, Caffe/2, etc.) is a strong plus
  • Experience programming and optimizing for embedded platforms such as DSPs with DMA engines highly desired
  • Familiarity with the state-of-the-art deep learning compilation approaches (Glow, TVM, XLA, etc.) is a plus
  • Familiarity with various deep learning networks and their applications (Classification/Segmentation/Object Detection/RNNs) is a plus
  • Knowledge of neural net exchange formats (ONNX, NNEF) is a plus

Additional Job Details:

  • Employment term: 40 hours/week.
  • Hybrid work.
  • Competitive benefits.

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments.

For more information, access http://www.cadence.com

We’re doing work that matters. Help us solve what others can’t.

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