Lead SOC verification Engineer

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

Lead SOC verification Engineer:

AMD is seeking a highly experienced SMTS Design Verification Engineer to lead verification efforts for next-generation Server SoC designs. The ideal candidate will possess deep expertise in developing scalable testbenches using SystemVerilog and UVM, demonstrate strong proficiency in formal and assertion-based verification methodologies, and have a solid understanding of RTL integration.

Key Responsibilities:

• Lead the development and execution of scalable, reusable SystemVerilog/UVM testbenches for server-class SoC verification.
• Drive verification strategy and planning for complex server SoC architectures, including integration of high-speed interfaces and subsystems.
• Develop and deploy SystemVerilog Assertions (SVA) for assertion-based verification, ensuring protocol and interface correctness across SoC boundaries.
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