About this role

NXP Semiconductors is hiring a senior-level Hardware Engineer in the software engineering function based in Noida, India. The posting calls out experience with Testing.

Role: Hardware Engineer
Function: software engineering
Level: senior
Track: Individual contributor
Employment: Full-time
Location: Noida, India
Posted: Jul 10, 2026

AI Summary

Design and implement DFT architectures for complex digital designs, including scan insertion, ATPG pattern generation, and test coverage validation. Collaborate with RTL and physical design teams to ensure high-quality silicon and resolve DFT issues from design through silicon bring-up.

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Job description

from NXP Semiconductors careers

Design for Test (DFT) Engineer (Experienced)

We are looking for an experienced DFT Engineer with strong expertise in scan, ATPG, and test methodologies for complex digital designs. The candidate will be responsible for implementing and validating DFT architectures to ensure high test coverage and quality silicon.

Key Responsibilities

Define and implement DFT architecture including scan, MBIST, and boundary scan.
Perform scan insertion, chain stitching, and compression techniques.
Generate and analyze ATPG patterns to achieve high fault coverage.
Debug and resolve DFT-related issues across design and silicon stages.
Work closely with RTL, Physical Design, and STA teams for smooth integration.
Support pattern validation, gate-level simulations, and silicon bring-up.
Ensure compliance with DFT and testability requirements.