Digital IC Design Engineer
Neuralink · Austin, TX | Fremont, CA · Brain Interfaces Hardware
About this role
Neuralink is hiring a mid-level Systems Engineer in the operations function based in Austin, TX | Fremont, CA. The posting calls out experience with Python, C, System Design, Machine Learning and roughly 5+ years of relevant work. Listed education preference: a bachelor's degree or equivalent. Compensation is listed at $116,000–$233,800 per year.
- Role
- Systems Engineer
- Function
- operations
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- Austin, TX | Fremont, CA
- Experience
- 5+ years
- Education
- Bachelor's degree
- Department
- Brain Interfaces Hardware
More roles at Neuralink
Job description
from Neuralink careersAbout Neuralink:
We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description & Responsibilities:
Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.
- Micro-architecture design and RTL implementation of:
- Low-power digital signal processors
- Low-power general-purpose hardware accelerators
- Low-power graphics processing units
- Low-power radio MAC/PHY
- Low-power serial link MAC/PHY
- Design and optimization of hardware/software interface with firmware engineers
- Application-specific architecture optimization including:
- Complex system modeling for energy and performance benchmarks