Principal Engineer - ASIC Physical Design

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community.

The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.

Requirements

• Minimum of 15 years of hands-on physical design implementation/IR/EM experience along with APR flow development and PPA analysis
• STA closure at block & Full Chip
• Experience in Advanced process technology nodes (5nm/3nm preferred)
• Experience with Ansys Redhawk-SC tool
• Experience with Cadence layout tools (Innovus, Tempus, etc..)
• Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool
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