staff operations Systems Engineer tech_leadership · Posted May 19, 2026
$145,000 – $246,000
USD per year

About this role

Micron is hiring a staff-level Systems Engineer in the operations function based in San Jose, CA. Compensation is listed at $145,000–$246,000 per year.

Role
Systems Engineer
Function
operations
Level
staff
Track
Tech leadership
Employment
Full-time
Location
San Jose, CA
Posted
May 19, 2026

More roles at Micron

Staff Engineer, Scribe Design Product Owner
Boise, ID · principal
Engineer - Metals Adv DRAM
Boise, ID · mid
Python Data Analytics
Software Development Engineer - Operations Improvement
Boise, ID · mid
Python Java C#
Product Development Engineer
San Jose, CA · mid
Testing Backend Development Data Analytics
Staff Product Development Engineer
Boise, ID · staff
Python Jira Tableau
All Micron jobs →

Job description

from Micron careers

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Staff Design Engineer at Micron, you will play a pivotal role in highly technical teams! You will be responsible for crafting and analyzing digital circuits used in memory product development. This role demands technical expertise and leadership to efficiently implement and optimize NAND circuits. You will collaborate with various internal and external teams to ensure our products meet high standards of performance, quality, and reliability!

Responsibilities

  • Interpret device and system specifications to deliver required functionalities
  • Participate in the conception and development of new circuits
  • Define and design composition architecture specifications for new features.
  • Support the creation of schematics and/or RTL blocks
  • Define best known design and verification practices and communicate them to the department
  • Perform RTL and synthesized netlist (gate level) verification at block, subsystem, and full chip level
  • Facilitate netlist bring up to achieve basic functionality
  • Responsible for delivering design simulation including post layout
  • Design verification plans for new and existing features and check desired behavior in Verilog
  • This is an excerpt. Read the full job description on Micron careers →
All operations jobs operations in San Jose, CA Jobs in San Jose, CA operations salaries operations career path
All Micron Jobs Browse operations roles staff positions