Senior Design Engineer
Micron · San Jose, CA
About this role
Micron is hiring a senior-level Systems Engineer in the operations function based in San Jose, CA. The posting calls out experience with Python, Bash, Git, Linux. Compensation is listed at $116,000–$246,000 per year.
- Role
- Systems Engineer
- Function
- operations
- Level
- senior
- Track
- Individual contributor
- Employment
- Full-time
- Location
- San Jose, CA
- Posted
- May 8, 2026
More roles at Micron
Job description
from Micron careersOur vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing analog and mixed circuits used in the development of memory products!
What’s Encouraged Daily!
- Design, simulate, optimize, and floorplan NAND analog and mixed‑signal circuits, including circuits that support dual‑mode operation for both storage and compute‑in‑memory use cases.
- Evaluate design feasibility and analyze circuit functionality across conventional memory operation and CIM‑enabled modes, accounting for accuracy, linearity, latency, power, and device variability. Design, simulate, and validate high‑performance ADC architectures (e.g., SAR, pipeline, or hybrid) for NAND sensing and mixed‑signal interfaces, optimizing resolution, speed, power, and area across PVT and mismatch.
- Implement analog and mixed‑signal circuit designs to meet specifications in areas such as sensing, amplification, bias generation, regulation, accumulation, and signal conditioning, with consideration for compute‑oriented extensions (e.g., multi‑level sensing, charge/current‑domain computation, or local analog processing).