The High Speed IO Electrical Validation Engineering Manager leads a team of engineers responsible for delivering robust, compliant, and production ready high speed IO silicon through strong technical leadership and execution ownership.
This role defines and drives HSIO electrical validation strategy across HSIO interfaces (such as PCIe, UCIe, GPIO, SERDES), ensuring signal integrity, analog performance, standards compliance, and system level margin targets are met from early silicon bring up through mass production.
The manager oversees HSIO validation planning and execution, including compliance testing, margin analysis, high speed debug, and lab to production correlation, while driving development of validation infrastructure, automation, and methodologies to improve coverage and efficiency.
In parallel, the role provides people leadership by setting clear goals, managing performance, developing senior HSIO technical talent, and fostering a high ownership culture.
Close collaboration with HSIO architecture, design, pre silicon validation, test, and manufacturing teams is essential to resolve electrical issues, influence design decisions, and continuously improve HSIO silicon quality.
Regular onsite presence is required to support lab based, onsite essential validation activities.

Qualifications:

At least 10 years' experience of technical/engineering/validation/equiv.
At least 5 years' experience with people leadership.
Able to communicate clearly across geo-function and stakeholder.
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Electrical Validation Engineering Manager