The Role and Impact  
We are seeking a highly motivated and skilled Senior Staff Analog Circuit Design Engineer to contribute to the design, implementation, and validation of advanced analog and mixed-signal circuits for high-speed (112G and 224G) SerDes applications. 

In this role, you will participate in the definition, design, and verification of high-performance analog blocks and subsystems, collaborating closely with system architects, digital designers, and layout engineers. The ideal candidate is self-driven, detail-oriented, and passionate about analog design in high-speed communication systems. 

 
Key Responsibilities  

• Design and implement advanced analog and mixed-signal circuits for 112G and 224G SerDes applications 
• Participate in the definition, design, and verification of high-performance analog blocks and subsystems 
• Engage in technical discussions and contribute to design reviews 
• Conduct post-silicon validation and performance optimization 
• Provide guidance to layout engineers and mentor junior analog designers 
• Collaborate across disciplines with system architects, digital designers, and layout teams 
• Develop innovative designs as part of a highly experienced SerDes team focused on next-generation high-speed interconnect solutions 

Core Competencies 

• Good communication and documentation skills, with a collaborative and proactive work style  
• Strong analytical thinking, hands-on debugging skills, and an eagerness to learn and share expertise within the team 
• Demonstrated ability to work effectively in cross-functional teams and contribute to technical reviews. 
• Excellent Communication Skills 

The Minimum qualifications are required to be initially considered for this position.  Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. 

Minimum Qualifications 

• Bachelor’s degree in Electrical Engineering, Electronics Engineering, or in a STEM related field 
• 2+ years of experience in analog/mixed-signal circuit design for high-speed SerDes or similar applications 
• Experience in one or more of the following domains: PLL, CDR, CTLE, DFE, ADC, LDO, Ref Gen, or Transmitter (TX) design 
• Experience with core analog design principles, including noise, linearity, matching, and stability 
• Experience with advanced FinFET CMOS process technologies 
• Experience with analog design and simulation tools such as Cadence Virtuoso/ADE, HSPICE, or equivalent 

Preferred Qualifications 

• Ph.D. in Electrical Engineering, Electronics Engineering, or in a STEM related field
• Experience with of transmitter and receiver design, CDR loops, and equalization techniques 
• Experience with next-generation high-speed standards such as PCIe 6.0, 800G Ethernet, or JESD 
• Experience with high-speed communication standards such as PCIe (Gen4/Gen5) and Ethernet (100G/400G)   
• Experience with Verilog-A modeling, MATLAB simulations, and automation scripting (e.g., Python, Tcl) 
• Experience with signal integrity concepts, channel modeling, and system-level link analysis