Failure analysis and TEM Engineer
Intel · Kiryat-Gat, Israel
About this role
Intel is hiring a mid-level Failure analysis and TEM Engineer based in Kiryat-Gat, Israel.
- Level
- mid
- Employment
- Full-time
- Location
- Kiryat-Gat, Israel
- Posted
- May 14, 2026
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Job description
from Intel careersJob Description:
Intel created HVM Global labs organization to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with the Technology Development (TD) team, and FSM fab managers.
This job requisition is seeking a Transmission Electron Microscopy (TEM) Engineer working in our Israeli failure analysis laboratories. Selected candidate will work in a dynamic team supporting technology development and yield improvement. The TEM group uses the latest state-of-the-art workflows leveraging a high level of autonomy. TEM engineers may support conventional manual TEM.
TEM Engineers Responsibilities Include (but Are Not Limited To)
• Review incoming requests and determine appropriate TEM workflow strategy. Prepare plans as appropriate for TEM sample preparation team.
• Hands on operation of laboratory equipment, such as TEM microscopes.
• Interpretation of complex TEM results, translating to actionable data for FAB process and integration teams.
• Support continual improvement and development of new workstreams and techniques.
• Develop a thorough understanding of manual TEM operation lines.
• Mentor TEM preparation technicians.
• Candidate should have the following behavioral skills:
• Demonstrated strength in teamwork, analytical problem solving, and effective oral and written communication skills.
• Inquisitive, desire to learn and expand knowledge in field.
• Ability to work with multi-functional, multi-cultural teams.
• Strong in decision making and problem solving.