mid software engineering Hardware Engineer ic 2+ yrs Bachelor's · Posted May 12, 2026
Skills
Linux

About this role

Intel is hiring a mid-level Hardware Engineer in the software engineering function based in Guadalajara, Mexico. The posting calls out experience with Linux and roughly 2+ years of relevant work. Listed education preference: a bachelor's degree or equivalent.

Role
Hardware Engineer
Function
software engineering
Level
mid
Track
Individual contributor
Employment
Full-time
Location
Guadalajara, Mexico
Experience
2+ years
Education
Bachelor's degree
Visa
Not sponsored
Posted
May 12, 2026
AI Summary
Mid-level hardware engineer designing physical layouts for Intel Atom CPU microprocessors. Drives memory compiler and custom IP block implementation across design stages, working with circuit engineers to optimize layouts. Requires 2+ years layout design experience, bachelor's in electrical/computer engineering, and permanent Mexico work authorization.

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Job description

from Intel careers

Job Details:

Job Description: 

This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.

As an Atom CPU Layout Design Engineer, you will be part of a highly skilled team responsible for the design of futuregeneration, highperformance Intel Atom microprocessors. In this role, you will drive the physical implementation of a variety of memory compilers, custom IP blocks, and layout partitions that directly support Intel’s CPU products.

You will work in a dynamic environment where design challenges are complex, assignments are broadly defined, and solutions often require creativity, deep technical knowledge, and strong problemsolving skills.

Your responsibilities will include, but will not be limited to:

  • Ensuring all physical design implementations follow bestinclass layout methodologies and deliver highly efficient, highquality results.
  • Independently performing and driving complex physical design assignments across multiple design stages.
  • Working closely with circuit design engineers to interpret schematics and translate them into optimized physical layouts.
  • Contributing across the full design flow—from leaflevel cell layout to blocklevel and toplevel integration.
  • Partnering with SoC teams and crosssite design groups to ensure alignment, reuse, and consistency across projects.
  • Developing or enhancing layout scripts, macros, and automation solutions to improve productivity and design robustness (a strong plus).

The ideal candidate should exhibit the following behavioral traits:

  • Excellent communication and interpersonal skills.
  • Prioritization and multitasking skills.
  • Good analytical and problem-solving skills.

Qualifications:

Minimum qualifications are required to be initially considered for this position.  Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field.
  • 2+ years of experience in layout design.
  • Advance English level.
  • Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred Qualifications:

  • Master's degree in electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline.
  • 2+ year of experience or familiarity with Very Large Scale of Integration (VLSI) and Complementary Metal-Oxide-Semiconductor (CMOS) logic circuit design.
  • 2+ year of knowledge in Unix/Linux operating systems.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Mexico)

Primary Location: 

Mexico, Guadalajara

Additional Locations:

Business group:

Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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