CPU Design Verification Engineer
Google · New Taipei, Taiwan | Zhubei, Taiwan
About this role
Google is hiring a mid-level Hardware Engineer in the software engineering function based in New Taipei, Taiwan | Zhubei, Taiwan. The posting calls out experience with Python, Bash, Linux, Android and roughly 4+ years of relevant work. Listed education preference: a bachelor's degree or equivalent.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- New Taipei, Taiwan | Zhubei, Taiwan
- Experience
- 4+ years
- Education
- Bachelor's degree
- Posted
- Jun 3, 2026
Job description
from Google careersBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Design verification for future CPU developments.
- Build functional verification infrastructure, the infrastructure will include unit, multi-unit, core, and subsystem level verification environments.
- Produce diagnostic code repositories that enable production of CPU’s.
- Verify and validate performance for both pre-silicon and post-silicon.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 4 years of experience with verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog.
- Experience developing and maintaining verification test benches, test cases, and test environments.
Preferred qualifications:
- Master’s degree in Electrical Engineering, Computer Science, or a related field.
- Experience with Universal Verification Methodology, SystemVerilog, or other scripting languages such as Python, Perl, Shell, Bash, etc.
- Experience with ARM Instruction Set Architecture.
- Knowledge of general purpose operating systems such as Linux and Android.