ASIC Design & Verification Engineer
Cisco · Caesarea, Israel · Product and Engineering
About this role
Cisco is hiring a mid-level Hardware Engineer in the software engineering function based in Caesarea, Israel. The posting calls out experience with Embedded Systems, Frontend Development.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- Caesarea, Israel
- Department
- Product and Engineering
- Posted
- Apr 16, 2026
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Job description
from Cisco careersMeet the Team
Join the Cisco Silicon One Front-End Design team, at the core of Cisco’s silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what’s possible.
Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco’s future routing portfolio and shaping the Internet for decades to come.
Your Impact
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab
Minimum Qualifications
B.Sc./M.Sc. in Electrical Engineering from a top university
3+ years of experience in the filed
knowledge with UVM and functional verification methodologies
Preferred Qualifications
Experience with MATLAB simulations and bit-exact modeling environments
Familiarity with mixed-signal systems and environments
Knowledge and hands-on experience with Clock Domain Crossing (CDC)