senior software engineering Hardware Engineer tech_leadership Bachelor's · Posted Jul 9, 2026
$136,500 – $253,500
USD per year
Skills
Python

About this role

Cadence Design Systems is hiring a senior-level Hardware Engineer in the software engineering function based in Cary 02. The posting calls out experience with Python. Listed education preference: a bachelor's degree or equivalent. Compensation is listed at $136,500–$253,500 per year.

Role
Hardware Engineer
Function
software engineering
Level
senior
Track
Tech leadership
Employment
Full-time
Location
Cary 02
Work mode
On-site
Education
Bachelor's degree
Posted
Jul 9, 2026
AI Summary
Senior Principal Hardware Engineer driving physical design solutions from synthesis to tape-out on advanced process nodes. Responsibilities include logic synthesis, place-and-route, clock construction, and design closure (timing, power, IR/EM). Requires deep expertise in floorplanning, routing, signoff activities, and cross-functional collaboration with RTL, DFT, and Architecture teams.

Job description

from Cadence Design Systems careers

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is the leader in hardware emulation-acceleration technologies and products. As a Physical Design Senior Principal Hardware Engineer, you will drive solutions for complex designs from synthesis to GDS through tape-out. You are knowledgeable about floorplan, clock construction, placement, routing, and signoff closure activities such as timing analysis, physical verification, and IR/EM. You have exceptional communication skills and can collaborate with partner RTL, DFT, and Architecture teams. As a principal engineer, you will contribute to further developing our tools and flows to improve design quality and execution. This position is located in our US offices (San Jose, CA or Raleigh, NC).

Our emulation-acceleration system platform is the most advanced industry-leading configurable scalable system, generation after generation, used in labs and datacenters.  At the heart of these systems are a multitude of interconnected highly complex high-performance computing (HPC) devices based on a proprietary Boolean processor architecture. This is a role in the core technology team.

Key Responsibilities:

The duties and responsibilities Senior Principal Hardware Engineer include:

  • Drive solutions in logic synthesis, floorplan, place and route (PNR), clock construction
  • Provide continuous improvement to existing tools, flows, and methodologies
  • Optimize power, performance, and area to meet design requirements
  • Experience with advanced process nodes and technologies
  • Collaborate closely with cross functional teams to ensure proper design execution
  • Work with R&D teams to improve Cadence’s suite of tools
  • Close designs adhering to timing, power, IR/EM, and foundry specifications

Qualifications

  • BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience
  • Successfully owned and driven blocks/SoCs to tape-out
  • Comfortable in the latest advanced technology nodes
  • Experience in at least one scripting language like PERL, Python, TCL, or Shell is preferred
  • Self-motivated, team player with strong problem-solving skills to collaborate with teams to deliver results
  • Excellent written and verbal communication skills
  • BS/MS with 8-15+ years of relevant hands-on experience in physical design

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

More roles at Cadence Design Systems

Memory Interface PHY IP, Design Engineering Architect
San Jose, CA · principal
Compliance
Business Systems Analyst (Salesforce, Vibe Coding)
San Jose, CA · mid
Salesforce Security Agile
CAE, Customer Service Engineer for Virtual Manufacturing & Costing simulation software
Burlington-Can 01 · mid
Python Linux
Lead Software Engineer
San Jose, CA · senior
Performance Optimization C++
Analog CAD Engineering specialist
Mount-Royal · mid
Design Systems
All Cadence Design Systems jobs →
All software engineering jobs software engineering salaries software engineering career path
All Cadence Design Systems Jobs Browse software engineering roles senior positions