Layout Design Engineer II (SerDes)

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title:         Layout Design Engineer (SerDes)

Location:        Cork , Ireland

Reports to:     Sr Principal Design Engineer

Job Overview:

The Layout Design Engineer will be responsible for transistor-level physical layout implementation of advanced analog and mixed-signal circuits for next-generation high-speed interface IP. This role sits within the SerDes Product Team based in Cork, Ireland, and works closely with cross-functional engineering partners to deliver high-quality, manufacturable designs.

Job  Responsibilities:

• Perform custom transistor-level layout for high-speed SerDes blocks, including PLLs, Clock and Data Recovery (CDR), TX/RX analog front-ends, equalisers (CTLE/DFE), bandgap and bias circuits, and high-speed clock distribution networks. 
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