Signal and Power Integrity Principal Application Engineer
Cadence Design Systems · San Jose, CA
About this role
Cadence Design Systems is hiring a principal-level Hardware Engineer in the software engineering function based in San Jose, CA. Compensation is listed at $113,400–$210,600 per year.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- principal
- Track
- Tech leadership
- Employment
- Full-time
- Location
- San Jose, CA
- Posted
- May 19, 2026
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Job description
from Cadence Design Systems careersAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The candidate needs to have the ability to analyze customer's environment and evaluate appropriate engineering solutions. Be knowledgeable and aware of competitive technologies. Anticipates technical issues and develops creative solutions before they become a problem. Takes technical lead on wide range of projects. Ability to understand high speed, high performance signal and power integrity related issues, and work with peers and other business groups. Able to work on-site with customers without supervision. Able to communicate effectively with Cadence R&D, Product Engineering, Marketing, Sales, and with Cadence customers. Understands customer success criteria and is committed to ensuring customer success.
Requirements:
Master’s or Ph.D. degree (preferred) in Electrical or Electronics Engineering with 5+ years related experience. In-depth knowledge of EDA industry with strong background in Signal Integrity, Power Integrity, Electromagnetics, Thermal, and RF related to Package and PCB Design are required. Candidate should have experience in Cadence Allegro platform tools including: Sigrity, Clarity, Celsius, PCB Editor, IC Package, or competitive tools in these areas. The candidate must possess excellent written and verbal communication skills. Ability to present and clearly articulate solutions individually, and in front of medium to large groups is essential.