senior software engineering Hardware Engineer tech_leadership 12-15 yrs Bachelor's · Posted Apr 20, 2026

About this role

Cadence Design Systems is hiring a senior-level Hardware Engineer in the software engineering function based in Noida, India. The posting calls out experience with LLMs, RAG, Reinforcement Learning, Machine Learning and roughly 12–15 years of relevant work. Listed education preference: a bachelor's degree or equivalent.

Role
Hardware Engineer
Function
software engineering
Level
senior
Track
Tech leadership
Employment
Full-time
Location
Noida, India
Experience
12–15 years
Education
Bachelor's degree
Posted
Apr 20, 2026
AI Summary
Sr Principal Verification Engineer applying machine learning to pre-silicon functional verification (formal, simulation, UVM). Requires 12-15+ years ASIC verification expertise, proficiency in Verilog/SystemVerilog/Python, and hands-on EDA tools experience. Collaborates with ML engineers to develop AI-enhanced verification methodologies.

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Job description

from Cadence Design Systems careers

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Name: Sr Principal Verification Engineer -Applied ML – Functional Verification  

 About Us

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Overview

We are seeking results driven Pre-Silicon Verification Engineer with extensive experience in function verification (formal verification and/or simulation/UVM verification) and a passion for leveraging artificial intelligence to redefine the verification landscape. In this role, you will operate at the forefront of semiconductor design and AI innovation, utilizing advanced AI tools to architect, design, and validate the next generation of verification methodologies. You will collaborate closely with a highly skilled team of machine learning engineers experienced in training large language models on a scale, as well as accomplished software engineers with proven expertise in product development and deployment.

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