mid Software Engineer ic Bachelor's · Posted Apr 20, 2026
$101,500 – $188,500
USD per year

About this role

Cadence Design Systems is hiring a mid-level Software Engineer based in San Jose, CA. The posting calls out experience with C, Distributed Systems, Data Structures, Machine Learning. Listed education preference: a bachelor's degree or equivalent. Compensation is listed at $101,500–$188,500 per year.

Role
Software Engineer
Function
software engineering
Level
mid
Track
Individual contributor
Employment
Full-time
Location
San Jose, CA
Education
Bachelor's degree
Posted
Apr 20, 2026
AI Summary
Design and optimize Static Timing Analysis (STA) engine algorithms for multi-billion-node timing graphs. Requires strong C/C++ proficiency, algorithms expertise, and experience with distributed/parallel computing or GPU acceleration. Statistical timing and variation modeling experience preferred.

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Job description

from Cadence Design Systems careers

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are looking for engineers with strong algorithmic foundations and a passion for building highly scalable C/C++ solutions to work on the core Static Timing Analysis (STA) engine.

The role involves designing, tuning, and innovating timing and graph algorithms operating on multi‑billion‑node timing graphs. These scale challenges require highly distributed, incremental, and parallel solutions, including opportunities to leverage GPU acceleration for performance‑critical workloads.

At advanced technology nodes, incorporating device variation and statistical modeling into the timing engine introduces additional complexity. Candidates with experience or strong interest in statistical timing, variation modeling, or large‑scale numerical algorithms are preferred.

Qualifications

  • Strong background in algorithms, data structures, and graph theory
  • Proficiency in C/C++ and performance‑oriented system design
  • Interest or experience in distributed systems, parallel computing, or GPU acceleration
  • Exposure to STA, EDA, or digital design concepts is a plus
  • Strong communication and teamwork skills

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