principal software engineering Principal Engineer tech_leadership Bachelor's · Posted Jun 14, 2026
$117,042 – $165,615
USD per year

About this role

Analog Devices is hiring a principal-level Principal Engineer in the software engineering function based in Dallas, Tollway, TX. The posting calls out experience with Python, HTML/CSS, Automation. Listed education preference: a bachelor's degree or equivalent. Compensation is listed at $117,042–$165,615 per year.

Role
Principal Engineer
Function
software engineering
Level
principal
Track
Tech leadership
Employment
Full-time
Location
Dallas, Tollway, TX
Work mode
On-site
Education
Bachelor's degree
Posted
Jun 14, 2026
AI Summary
Design verification engineer supporting product development through behavioral modeling, mixed-signal verification, and full-chip validation. Creates self-checking test benches, System Verilog environments, and simulation infrastructure. Collaborates with analog and digital design teams to establish metric-driven verification best practices.

Job description

from Analog Devices careers

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

Employer: Analog Devices, Inc.  

Job Title: Senior Engineer, Design Verification Engineering

Job Requisition: R262670 

Job Location: Dallas, Texas

Job Type: Full Time

Rate of Pay: $117,042 - $165,615 per year

[multiple openings]

Duties: Support and accelerate product development of industry leading products involving behavioral modeling of analog circuits, spice, and mixed-signal verification; full-chip verification; and digital circuit verification. Establish and promote the adoption of metric-driven verification best practices. Leverage complex digital and mixed-signal circuits and create self-checking test benches to validate designs before production. Work with analog, digital, and mixed-signal design engineers to create state-of-the-art models of mixed-signal ICs. Apply verification methodologies to reach verification goals, including creating System Verilog simulation environments and infrastructure to verify functionality, accuracy, and performance and integrate models into full-chip simulations. Create scripts using scripting languages to analyze simulation data, validate models, and build simulation test benches. Correlate results with multidisciplinary teams involved in the design. Support design teams in identifying, debugging, and resolving issues. Assist in developing project verification strategies, planning, resource tracking, and results analysis, to ensure on-schedule product delivery.

Partial telecommute benefit (2 days/week work from home).

Requirements: Must have a Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and two (2) years of experience as a Design Verification Engineer or related occupation performing IC design or validation.

Alternatively, a Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and four (4) years of experience as a Design Verification Engineer or related occupation performing IC design or validation.

Must also possess the following (quantitative experience requirements not applicable to this section):

  • Demonstrated Expertise (DE) in Perl or Python scripting for data processing, data design creation, data collection, analysis, design automation tools controls, and input/output data formatting.
  • DE executing the full-lifecycle of design/verification, including verification planning, test bench and test case development, architecting coverage and performing system debugging utilizing Cadence Xcelium simulator suite, Synopsys VCS or equivalent.
  • DE driving metric-driven verification, including specifying, developing, and leveraging advanced verification capabilities using System Verilog, UVM, and coverage analysis.
  • Demonstrated understanding of analog and digital circuits through prior work experience and coursework.
  • DE eliciting and communicating complex technical details before key stakeholders.

Contact: Eligible for employee referral program. Apply online at https://www.analog.com/en/careers.html and Reference Position Number: R262670.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: Experienced

          

Required Travel: No

          

Shift Type: 1st Shift/Days

          

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