SoC Physical Integration Engineer

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE:

AMD’s Adaptive Embedded Compute Group (AECG) builds products that blend powerful, energy-efficient processors, advanced neural engines and graphics processors, and adaptive embedded compute with programable logic to build edge computing solutions. From autonomous vehicles and industrial robotics to smart healthcare devices, AMD AECG is redefining intelligent edge computing.

THE PERSON

As a member of the SoC Physical Integration team, you'll interface with various engineering groups, including architecture, design, CAD, software, and product engineering, across various geographies to work towards the physical/electrical verification and tape out of AMD SoC FPGA/ACAP devices. 

KEY RESPONSIBILITIES: 

• Defining and developing flows and methodologies for chip level integration
• Developing tools for design verification or efficiency
• Designing (RTL and custom), verifying, and integrating FPGA/ACAP sub-blocks
• Coordinating activities between different design groups to ensure smooth integration
• Executing chip level physical verification
• Executing chip level electrical verification

PREFERRED EXPERIENCE:

• Solid understanding of FPGA architecture
• Familiarity with physical implementation with hands‑on experience using one or more industry‑standard tools Virtuoso, ICC2, FC, Innovus, or at least one of PD tools.
• Strong foundational knowledge of circuit design, including hands‑on simulation experience with SPICE and Verilog
• Knowledge of and/or practical experience with Place and Route (P&R) tools
• Strong debugging and problem‑solving skills
• Proficiency in scripting languages such as Perl, Python, TCL, C‑shell, Make, and/or other relevant scripting languages
• Experience with Unix/Linux environments, including basic data management and job control
• Excellent written and verbal communication skills, with the ability to collaborate effectively across teams

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master's degree in Electrical Engineering or equivalent.

LOCATION: San Jose, CA

This role is not eligible for visa sponsorship.

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.