senior software engineering Hardware Engineer ic 8+ yrs Bachelor's · Posted Apr 20, 2026

About this role

NXP Semiconductors is hiring a senior-level Hardware Engineer in the software engineering function based in Pune, India. The posting calls out experience with Python, Backend Development and roughly 8+ years of relevant work. Listed education preference: a bachelor's degree or equivalent.

Role
Hardware Engineer
Function
software engineering
Level
senior
Track
Individual contributor
Employment
Full-time
Location
Pune, India
Experience
8+ years
Education
Bachelor's degree
Posted
Apr 20, 2026
AI Summary
Lead physical design and implementation of high-performance semiconductor ICs, conducting power integrity analysis, floor planning, place and route, timing closure, and physical verification. Drive design methodologies and mentor junior engineers. Requires 8-9+ years experience with advanced tech nodes, expertise in PDN/power analysis, and proficiency with EDA tools like Cadence Innovus and Synopsys ICC2.

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Job description

from NXP Semiconductors careers

Job Summary

We are seeking a highly experienced PDN Engineer for iMCU & Connectivity to lead and contribute to the physical design and implementation of complex, high-performance semiconductor integrated circuits. This role involves driving technical solutions, mentoring junior engineers, and ensuring the timely delivery of cutting-edge products within NXP's diverse portfolio.


Job Responsibilities
As a PD Engineer, your responsibilities will include but are not limited to:
*Conduct power integrity (IR drop), SNA and EM on top-level.
*Will be responsible for floor planning, power grid design, place and route, low power implementation, clock tree synthesis, timing closure, power/signal integrity analysis, to physical verification (DRC/LVS/Antenna).

*The role would involve in-depth knowledge and responsibilities spanning all aspects of physical implementation.

* Drive the definition and implementation of physical design methodologies, flows, and best practices to optimize performance, power, and area.
* Perform comprehensive static timing analysis (STA) and ensure all timing constraints are met across various corners and modes.
* Collaborate closely with architecture, RTL design, DFT, and package teams to ensure seamless integration and successful product delivery.
* Evaluate and adopt new EDA tools and technologies to improve design efficiency and quality.


Job Qualifications
* Bachelor's degree with 9+ years of professional experience or Master's degree with 8+ years of professional experience.

This is an excerpt. Read the full job description on NXP Semiconductors careers →
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