ASIC Floorplan Design Engineer
Nvidia · Shanghai, China
About this role
Nvidia is hiring a mid-level Hardware Engineer in the software engineering function based in Shanghai, China. The posting calls out experience with Python, C.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- Shanghai, China
- Posted
- May 15, 2026
More roles at Nvidia
Job description
from Nvidia careersWe are now looking for an ASIC Floorplan Design Engineer.
NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you will be doing:
Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development.
Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities.
Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions.
You will build tools and improve existing infrastructure to optimize chip area and speed of execution.
What we need to see: