Staff Design Architect(Datapath), HBM
Micron · Richardson, TX
About this role
Micron is hiring a staff-level Hardware Engineer in the software engineering function based in Richardson, TX. The posting calls out experience with Performance Optimization and roughly 4+ years of relevant work. Listed education preference: a bachelor's degree or equivalent.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- staff
- Track
- Tech leadership
- Employment
- Full-time
- Location
- Richardson, TX
- Experience
- 4+ years
- Education
- Bachelor's degree
- Posted
- May 18, 2026
More roles at Micron
Job description
from Micron careersOur vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
We are seeking a highly motivated HBM Datapath Architect to architect, design, and optimize high‑speed data paths for next‑generation High Bandwidth Memory (HBM) products! This role focuses on logic‑die and core‑die datapath circuitry, enabling industry‑leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring‑up and production.
Responsibilities will include, but are not limited to:- Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic
- Develop high‑speed, low‑latency datapath circuits supporting multi‑channel HBM architectures and wide internal buses
- Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes
- Design and integrate data reliability features, including parity, ECC hooks, lane redundancy, and remapping mechanisms
- Collaborate with multi-functional teams to translate specifications into robust micro‑architectures