DDR Pre-Silicon Verification Architect
Intel · Bangalore, India
mid
· Posted May 14, 2026
Skills
About this role
Intel is hiring a mid-level DDR Pre-Silicon Verification Architect based in Bangalore, India. The posting calls out experience with Testing.
- Level
- mid
- Employment
- Full-time
- Location
- Bangalore, India
- Posted
- May 14, 2026
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Job description
from Intel careersJob Details:
Job Description:
Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to mixed signal microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology.Qualifications:
This is an excerpt. Read the full job description on Intel careers →