IP Design Verification Engineer

Job description

Job Description: 

The Role and Impact
As an IP Design Verification Engineer, you will play a key role in ensuring the functionality and performance of Intel's cutting-edge intellectual property (IP) designs for system-on-chip (SoC) applications. You will be directly contributing to the next-generation LPDDR5 and DDR5 PHY verification efforts on Intel's leading process nodes. By joining our dynamic and innovative team, you will have the unique opportunity to shape the development of groundbreaking technologies that drive the future of computing.

Your work will involve collaborating with architects, RTL developers, and physical design teams to validate complex architectural and microarchitectural features. Through your expertise, you will ensure the robustness of Intel's IP designs, delivering critical contributions to the broader goals of Intel's success.

Key Responsibilities :

• Own RTL validation for functional and/or DFx (design for test/debug).
• Develop OVM/UVM-based test benches as a platform for RTL validation.
• Define verification strategies, methodologies, and detailed test plans for effective RTL validation.
• Create Bus Functional Models (BFM) to interface with the IP, monitor transactions, and verify protocol compliance.
• Implement and execute test cases, assertions, and functional coverage using System Verilog, ensuring alignment with verification plans.
• Set up and perform gate-level simulations (GLS) to verify asynchronous and multi-cycle paths.
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