RTL Design Engineer
Intel · Austin, TX
mid
software engineering
Hardware Engineer
ic
· Posted May 14, 2026
$105,650 – $200,340
USD per year
About this role
Intel is hiring a mid-level Hardware Engineer in the software engineering function based in Austin, TX. The posting calls out experience with Python, Git. Compensation is listed at $105,650–$200,340 per year.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- Austin, TX
- Posted
- May 14, 2026
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Job description
from Intel careersJob Details:
Job Description:
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure highquality integration of the CPU block.Qualifications:
This is an excerpt. Read the full job description on Intel careers →