mid machine learning Research Scientist ic Bachelor's · Posted Mar 13, 2026
$147,000 – $211,000
USD per year
AI Summary
Develop and analyze gate schemes for superconducting qubit inter-chip operations, focusing on tunable couplers and waveguides. Perform numerical simulations, create physical process models for gate errors, and collaborate with hardware teams on experimental data interpretation and gate optimization.
As an organization, Google maintains a portfolio of research projects driven by fundamental research, new product innovation, product contribution and infrastructure goals, while providing individuals and teams the freedom to emphasize specific types of work. As a Research Scientist, you'll setup large-scale tests and deploy promising ideas quickly and broadly, managing deadlines and deliverables while applying the latest theories to develop new and improved products, processes, or technologies. From creating experiments and prototyping implementations to designing new architectures, our research scientists work on real-world problems that span the breadth of computer science, such as machine (and deep) learning, data mining, natural language processing, hardware and software performance analysis, improving compilers for mobile platforms, as well as core search and much more.

As a Research Scientist, you'll also actively contribute to the wider research community by sharing and publishing your findings, with ideas inspired by internal projects as well as from collaborations with research programs at partner universities and technical institutes all over the world.

In this role, you will focus on the modeling of inter-chip gate operations based on superconducting qubits, specifically centering on chip-to-chip connections using tunable couplers and superconducting waveguides. You will develop and analyze gate schemes suitable for multiplexing to reduce total line counts, which includes creating numerical models of physical processes that lead to gate errors. Your work will involve performing numerical simulations to compare with experimental results for gate optimization, while working in close collaboration with the hardware team to provide theoretical analysis and interpretation of experimental data.

The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.

The US base salary range for this full-time position is $147,000-$211,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Perform numerical simulations of inter-chip gate operations for superconducting transmon qubits and develop gate schemes suitable for multiplexing.
  • Develop physics-based models for gate error mechanisms such as inter-chip cross-talk.
  • Optimize system parameters through numerical simulations.
  • Analyze experimental data.
  • Propose and analyze new couplers for chip-to-chip connection with advanced performance.

Minimum qualifications:

  • PhD degree in Physics or Electrical Engineering, or equivalent practical experience.
  • Experience with coding in Python.
  • One or more scientific publication submissions for conferences, journals, or public repositories related to quantum computing.

Preferred qualifications:

  • Experience with modeling of inter-chip gate operations.
  • Experience with superconducting waveguide analysis.
  • Experience with tunable couplers.
  • Experience with parametric gates.
  • Experience with transmon flux/charge noise analysis.
  • Experience with Mathematica and C/C++.
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