ASIC Engineering Design Verification Leader
Cisco · Pune, India · Product and Engineering
About this role
Cisco is hiring a mid-level Hardware Engineer in the software engineering function based in Pune, India. The posting calls out experience with Python, Linux, Serverless, Testing.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- Pune, India
- Department
- Product and Engineering
- Posted
- May 18, 2026
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Job description
from Cisco careersWhat You'll Do
We are looking for talented and experienced Design Verification Engineer to join our team and be a hands-on verification engineer for Cisco's silicon photonics driver integrated circuits for next generation of products for 100, 200 and 400G per Lambda solutions. You will be a part of a wider team verifying control loop state machines, CPU subsystems, interfaces, receive and transmit paths in a silicon photonics module.
With a good understanding of digital systems and RTL design fundamentals, you will help develop test benches and write functional tests to provide coverage at block level testing and top-level testing as well. You will be responsible for writing analog models as well as verifying functionality across analog and digital interfaces. Post silicon, you will also be responsible for converting these to ATE test vectors. You will participate in all stages of design from concept to production.
Specific responsibilities include:
Develop testbench components and directed and random verification scenarios
Good understanding of high speed SerDes, Ethernet, D2D PHY IP & Protocols
Proven ability to build UVM components (agents, drivers, monitors, scoreboards, sequences) and implement constrained-random and directed test strategies
Ability to understand coverage metrics and functional specifications
Develop and document test plans at block level and migrate plans to top level
This is an excerpt. Read the full job description on Cisco careers →