ASIC Technical Leader- DFT
Cisco · San Jose, CA · Product and Engineering
About this role
Cisco is hiring a staff-level Technical Lead in the software engineering function based in San Jose, CA. The posting calls out experience with Python, Frontend Development, Backend Development. Compensation is listed at $183,800–$263,600 per year.
- Role
- Technical Lead
- Function
- software engineering
- Level
- staff
- Track
- Tech leadership
- Employment
- Full-time
- Location
- San Jose, CA
- Department
- Product and Engineering
- Posted
- May 6, 2026
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Job description
from Cisco careersJob posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
Meet the Team:
You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities.
Key Contributions:
- Manages the definition, architecture and design of high performance ASICs
- Owns applications or multiple complex functional areas
- Oversees reusable code and its applications
- Creates re-usable code that promotes efficiencies in new ways
- Defines verification strategies
- Coordinates with appropriate stakeholders to integrate into PD and DV flows
- Owns infrastructure and testing environmens
- Leads and designs the building blocks of multiple channels
- Applies and drives the design methodology from conception to production
- Influences and collaborates with teams to ensure specifications and requirements are met