Design Verification Engineer- Tile
Cerebras Systems · Sunnyvale, CA · Silicon
About this role
Cerebras Systems is hiring a mid-level Hardware Engineer in the software engineering function based in Sunnyvale, CA. The posting calls out experience with Python, C#, LLMs, Machine Learning. Listed education preference: a bachelor's degree or equivalent. Compensation is listed at $120,000–$240,000 per year.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- Sunnyvale, CA
- Education
- Bachelor's degree
- Department
- Silicon
More roles at Cerebras Systems
Job description
from Cerebras Systems careersCerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs.
Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference.
Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.
Key Responsibilities
- Work with architects, designers, post-silicon, and software engineers, to ensure a high-quality design that works for silicon.
- Develop and implement verification strategies, detailed tests, and coverage plans based on micro-architecture.
- Create verification methodologies and reusable environments, including components such as stimulus, checkers, assertions, and coverage.