Principal EDA Software Engineer (C++, Characterization)
Cadence Design Systems · San Jose, CA
principal
Software Engineer
tech_leadership
· Posted Apr 20, 2026
$136,500 – $253,500
USD per year
About this role
Cadence Design Systems is hiring a principal-level Software Engineer based in San Jose, CA. The posting calls out experience with Linux, Distributed Systems, Data Structures, API Development. Compensation is listed at $136,500–$253,500 per year.
- Role
- Software Engineer
- Function
- software engineering
- Level
- principal
- Track
- Tech leadership
- Employment
- Full-time
- Location
- San Jose, CA
- Posted
- Apr 20, 2026
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Job description
from Cadence Design Systems careersAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our expert R&D team as we create technologies and products that enable static and dynamic transistor-level analysis of the most advanced custom digital and mixed-signal circuits, powering the communication, IoT, and AI markets.
Key Responsibilities
- Enhance and expand existing tools' architecture to cover timing analysis.
- Create new frameworks for analyzing effects dominant at n5 and below.
- Leverage machine learning technology to achieve significant improvements in speed, capacity, and usability over existing solutions.
Must-Have Qualifications
- 8+ years of experience in development of EDA tools and expertise in one or more areas: transistor-level timing, power, noise, aging, reliability, and EMIR analysis.
- Hardcore C++ knowledge, particularly in a Linux environment.
- Strong proficiency in designing data structures, algorithms, and applying software engineering principles.
- Industry experience developing and maintaining C++ based applications on Unix or Linux platforms.
Requirements
- Experience with quality and software processes.
- Proficiency in designing data structures, algorithms, and software engineering principles.
- Ability to analyze transistor or gate-level schematics.
- BS degree in Computer Science, Electrical Engineering, or Computer Engineering preferred.
This is an excerpt. Read the full job description on Cadence Design Systems careers →