Design Verification Engineer

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE: 

The focus of this Design Verification Engineer role is to drive end-to-end IP/feature verification with strong technical ownership. This role combines deep specialization (UVM/verification/debug) with broad cross-domain understanding (architecture, RTL, firmware, software), enabling integrative technical decisions that materially impact product quality, schedule, and execution.

THE PERSON:  

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:  

• Collaborate with architects, hardware engineers, firmware engineers, and software teams to understand and verify new features.
• Build comprehensive test plans covering feature behavior, cross-feature interactions, hardware/firmware dependencies, and driver use cases.
• Estimate effort and timelines for test development and test environment updates.
• Develop, automate, and execute high-quality directed and constrained-random verification tests using UVM/SystemVerilog and C++-based validation frameworks to ensure robust feature coverage and efficient bug detection.
• Debug complex test failures, identify root cause, and partner with RTL/firmware teams to resolve design and test issues.
• Review functional and code coverage; add/adjust tests and constraints to meet closure goals.
• Build and improve verification frameworks, regression quality, and automation workflows.
• Drive simulation efficiency improvements through profiling, acceleration, and methodology/process enhancements.

SCOPE, OWNERSHIP, AND IMPACT:  

• Owns processes of significant technical importance, including outcomes in own area and interdependent areas.
• Solves complex, novel, and non-recurring problems; initiates and leads significant method/process improvements.
• Influences technical decisions with significant impact on final product quality and delivery.
• Operates with a 3–6 month business and technical planning horizon.
• Works with limited supervision; performance is evaluated based on project execution and results.
• Understands that errors can place project timelines at risk and create commercial exposure.
• Coaches and mentors less-experienced engineers; serve as a technical leader across teams.

QUALIFYING SKILLS AND EXPERIENCE:  

• Strong hands-on expertise in UVM concepts and SystemVerilog.
• Strong RTL/firmware debug capability using simulation tools.
• Proficiency in IP-level ASIC verification.
• Programming knowledge in Verilog/SystemVerilog, C, and C++.
• Assembly-level debugging ability.
• Experience in Linux environments; working familiarity with Windows.
• Scripting proficiency in Perl or Python (shell/Makefile/Ruby beneficial).
• Practical experience with functional and code coverage analysis and closure.

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering OR Electrical Engineering is strongly preferred.  

LOCATION: 

Markham, Ontario, Canada

#LI-MR1

#LI-HYBRID

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.