RTL Tools & Methodology Engineer
AMD · San Jose, CA · Engineering
About this role
AMD is hiring a mid-level Hardware Engineer in the software engineering function based in San Jose, CA. The posting calls out experience with Python, Frontend Development, Embedded Systems.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Location
- San Jose, CA
- Department
- Engineering
- Posted
- Apr 28, 2026
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Job description
from AMD careersWHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
Join our leading-edge RTL Design Methodology team as a Hardware Development Engineer, where you will contribute to the development of next-generation FPGA products. In this role, you will help define and improve the methodologies and tools that enable high-quality RTL design across our engineering organization.
Working closely with RTL designers and verification engineers, you will support the deployment and improvement of front-end design and static verification flows that ensure robust, high-quality silicon. This is an excellent opportunity to build deep expertise in advanced FPGA development while contributing to methodologies used across the company.