SoC Modeling & Simulation Sr. Manager, Annapurna Labs Machine Learning Accelerators, AWS
Amazon · Cupertino, CA · Software Development
About this role
Amazon is hiring a senior-level Engineering Manager in the software engineering function based in Cupertino, CA. The posting calls out experience with AWS, Testing, Machine Learning, Automation and roughly 22+ years of relevant work. Compensation is listed at $253,100–$342,300 per year.
- Role
- Engineering Manager
- Function
- software engineering
- Level
- senior
- Track
- hybrid
- Employment
- Full-time
- Location
- Cupertino, CA
- Experience
- 22+ years
- Department
- Software Development
- Posted
- Jan 8, 2026
More roles at Amazon
Job description
from Amazon careersAWS designs some of the most complex custom SoCs in the world — Trainium chips that power massive machine learning training clusters. Our team builds models of these SoCs that are used across the chip development lifecycle: architecture exploration, design verification, and performance analysis. We need a hands-on engineering manager to lead and scale this modeling effort. You'll own the modeling stack that chip architects, RTL designers, and verification engineers depend on to build correct, high-performance silicon. This is a technical leadership role where you'll drive both the team's execution and its long-term modeling strategy — including expanding into performance modeling to influence architecture decisions earlier in the chip cycle. This isn't a "manage from the sidelines" role — you'll be in the codebase, debugging model issues, and making architecture decisions alongside your team. What you'll do: - Lead the team building functional and performance models of SoC subsystems — from individual IP blocks to full-chip and server-level integration - Own the modeling methodology and architecture: how models are structured, tested, integrated, and validated against RTL and specs - Drive the expansion into performance modeling - building cycle-approximate or analytical models that inform architecture trade-offs - Partner with chip architects…