PMIC Analog Designer
NXP Semiconductors · Chandler, AZ
About this role
NXP Semiconductors is hiring a mid-level Hardware Engineer in the software engineering function based in Chandler, AZ.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- Chandler, AZ
- Posted
- May 20, 2026
More roles at NXP Semiconductors
Job description
from NXP Semiconductors careersJob Responsibility:
Architect, model, and define sub-system specifications for advanced power management solutions, including:
DC-DC converters (inductive and capacitive)
LDOs, shunt regulators, and multi-rail PMIC architectures
Translate system-level specifications into elegant, robust, and cost-effective silicon solutions Lead end-to-end design of power management circuits, including:
High-current power stages and advanced packaging-aware design
Loop stability, transient performance, and efficiency optimization
Define architecture and provide detailed design specifications to global teams; lead and mentor junior design engineers Develop system and behavioral models (MATLAB/Simulink, Verilog-A/AMS) to validate architecture, loop stability, and system performance Drive and participate in critical design reviews and ensure design quality, robustness, and manufacturability Serve as the PMIC technical lead and primary interface to Tier-1 customers, driving technical discussions and alignment Collaborate cross-functionally with system, layout, product, test, packaging, and quality teams to ensure successful product execution Provide technical leadership for innovation strategy, including proposing and reviewing long-term roadmap and new architectures Drive differentiated innovation and contribute to patentable solutions for next-generation power management products
Job Qualification:
MS in Electrical Engineering with 12+ years of experience, or PhD with 10+ years of experience in power management IC development Proven expertise in power conversion topologies:
Buck, boost, buck-boost, charge pumps, LDOs, and multi-phase architectures