Design Verification Engineer
Broadcom · USA-CA San Jose Innovation Drive
About this role
Broadcom is hiring a mid-level Hardware Engineer in the software engineering function based in USA-CA San Jose Innovation Drive. The posting calls out experience with Python, Testing, Networking, API Development. Compensation is listed at $120,000–$192,000 per year.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- USA-CA San Jose Innovation Drive
- Posted
- May 21, 2026
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Job description
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Job Description:
The CSG group at Broadcom has brought some of the most complex and cutting edge networking ASIC's and multichip solutions to market over the last decade. The group
develops Tomahawk ASICs for Scale-Out and Scale-Up AI Networks. These products support the latest networking protocols and features as well as manage extremely large volumes of traffic of the order of several hundreds of Terabits/sec. These networking ASIC's support a large number of ports ranging from 10/100Mb/s to 1600Gb/s speeds as well as various line interfaces and protocols.
The successful candidate will be responsible for various key tasks in the areas of verification of cutting edge network switch routing designs. The daytoday tasks for this position include but are not limited to the following:
1) Participating in the verification processes of L2/L3 Network Switching and routing ASICs and various subsystems within these chips
2) Understanding the architecture and implementation of these chips and coming up with in depth test plans for verifying various key networking features such as L2/L3 traffic streaming, traffic management, scheduling and shaping of traffic, latency and performance characterization of chips and systems.