R&D Engineer IC Design 4

Job description

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

You will be responsible for the front end design and verification of design blocks for these cores. Specific duties will include, but are not limited to architecture definition, logic design, synthesis, constraint development; design verification through simulation, formal verification, along with analysis of timing from the physical implementation. You will design logic blocks from systems requirements documents and will simulate and debug designs with Verilog simulation. Familiarity with entire ASIC design and implementation flow.

·        Ability to work independently as well as part of a large team spanning multiple geographies.

·        Education: BS/MS in Electrical or Computer Engineering or equivalent

· Bachelors and 8+ years of related experience; or Masters degree and 6+ years of related experience

·        Experience with complete ASIC or standard product implementation flow from RTL synthesis, timing analysis / closure.

·        Requires proficiency with the following design tools / flows:

·         TCL/Perl scripting

·         Synthesis experience with either Synopsys Design Compiler/ DC topo or Cadence RTL compiler