Digital Design: SerDes Digital IP Design Engineer
Broadcom · USA-Colorado-Fort Collins-4380 Ziegler Road
About this role
Broadcom is hiring a mid-level Hardware Engineer in the software engineering function based in USA-Colorado-Fort Collins-4380 Ziegler Road. The posting calls out experience with Linux, System Design and roughly 10+ years of relevant work. Listed education preference: a bachelor's degree or equivalent. Compensation is listed at $127,100–$203,400 per year.
- Role
- Hardware Engineer
- Function
- software engineering
- Level
- mid
- Track
- Individual contributor
- Employment
- Full-time
- Location
- USA-Colorado-Fort Collins-4380 Ziegler Road
- Experience
- 10+ years
- Education
- Bachelor's degree
- Posted
- May 22, 2026
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Job description
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Job Description:
Digital Design: SerDes Digital IP Design Engineer:
Oversees definition, design, verification co-definition, and documentation for SerDes development. Performs architecture design, rtl development, constraints, synthesis, timing analysis, verification, documentation, and support for SerDes designs. Knowledge of all aspects of the process flow from high-level RTL design to synthesis, RTL/ netlist audits (using tools such as Spyglass), Formal verification, constraints development and analysis w/ emphasis on CDCs in the context of synthesis and over all use in PrimeTime, Timing model generation (ETM/ .db). Emphasis on Spyglass lint, CDC and abstract model generation along with design constraint and timing analysis.
Knowledge:
Synthesis flows (design compiler or newer tools), lint and CDC analysis (spyglass), constraints development and timing model creation (primetime) along with formality is desired. Knowledge of SerDes architecture and protocols are a plus. Knowledge of spyglass, VC spyglass, design compiler and primetime is a must.
Job Complexity: